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  CLA40P1200FC phase leg high efficiency thyristor 2 4 3 1 5 part number CLA40P1200FC backside: isolated tav t v v 1,19 rrm 40 1200 = v = v i = a 2x features / advantages: applications: package: thyristor for line frequency planar passivated chip long-term stability line rectifying 50/60 hz softstart ac motor control dc motor control power converter ac power control lighting and temperature control i4-pac industry convenient outline rohs compliant epoxy meets ul 94v-0 soldering pins for pcb mounting backside: dcb ceramic reduced weight advanced power cycling isolation voltage: v~ 3000 the data contained in this product data sheet is ex clusively intended for technically trained staff. t he user will have to evaluate the suitability of th e product for the intended application and the completeness of the product data with respect t o his application. the specifications of our compon ents may not be considered as an assurance of compo nent characteristics. the information in the valid application- and assembly notes must be considered. should you require produc t information in excess of the data given in this p roduct data sheet or which concerns the specific application of your product, please co ntact the sales office, which is responsible for yo u. due to technical requirements our product may conta in dangerous substances. for information on the typ es in question please contact the sales office, whi ch is responsible for you. should you intend to use the product in aviation, i n health or live endangering or life support applic ations, please notify. for any such application we urgently recommend - to perform joint risk and quality assessments; - the conclusion of quality agreements; - to establish joint measures of an ongoing product survey, and that we may make delivery dependent on the realization of any such measures. terms conditions of usage: ixys reserves the right to change limits, condition s and dimensions. 20150827c data according to iec 60747and per semiconductor un less otherwise specified ? 2015 ixys all rights reserved
CLA40P1200FC v = v ka2s ka2s ka2s ka2s symbol definition ratings typ. max. i v i a v t 1,25 r 0,8 k/w min. 40 v v 50 t = 25c vj t = c vj ma 4 v = v t = 25c vj i = a t v t = c c 95 p tot 150 w t = 25c c 40 1200 forward voltage drop total power dissipation conditions unit 1,49 t = 25c vj 125 v t0 v 0,86 t = c vj 150 r t 7,9 m ? v 1,19 t = c vj i = a t v 40 1,50 i = a80 i = a80 threshold voltage slope resistance for power loss calculation only a 125 v v 1200 t = 25c vj i a 63 p gm w t = 30 s 10 max. gate power dissipation p t = c c 150 w t = 5 p p gav w 0,5 average gate power dissipation c j 25 junction capacitance v = v400 t = 25c f = 1 mhz r vj pf i tsm t = 10 ms; (50 hz), sine t = 45c vj max. forward surge current t = c vj 150 i2t t = 45c value for fusing t = c 150 v = 0 v r v = 0 v r v = 0 v v = 0 v t = 8,3 ms; (60 hz), sine t = 10 ms; (50 hz), sine t = 8,3 ms; (60 hz), sine t = 10 ms; (50 hz), sine t = 8,3 ms; (60 hz), sine t = 10 ms; (50 hz), sine t = 8,3 ms; (60 hz), sine vj r vj r thjc thermal resistance junction to case t = c vj 150 650 700 1,54 1,48 aa a a 555 595 2,12 2,04 1200 300 s rms forward current t(rms) tav 180 sine average forward current (di/dt) cr a/s 150 repetitive, i = t vj = 150 c; f = 50 hz critical rate of rise of current v gt gate trigger voltage v = 6 v t = c25 (dv/dt) t = 150c critical rate of rise of voltage a/s 500 v/s t = s; i a; v = ? v r = ; method 1 (linear voltage rise) vj d vj 120 a t pg = 0,3 di /dt a/s; g = 0,3 drm cr v = ? v drm gk 1000 1,5 v t = c -40 vj i gt gate trigger current v = 6 v t = c25 d vj 50 ma t = c -40 vj 1,6 v 80 ma v gd gate non-trigger voltage t = c vj 0,2 v i gd gate non-trigger current 3 ma v = ? v d drm 150 latching current t = c vj 125 ma i l 25 t s p = 10 i a; g = 0,3 di /dt a/s g = 0,3 holding current t = c vj 100 ma i h 25 v = 6 v d r = gk gate controlled delay time t = c vj 2 s t gd 25 i a; g = 0,3 di /dt a/s g = 0,3 v = ? v d drm turn-off time t = c vj 200 s t q di/dt = a/s 10 dv/dt = v/s 20 v = r 100 v; i a; t = 40 v = ? v drm t s p = 200 non-repet., i = 40 a t 125 r thch thermal resistance case to heatsink k/w thyristor 1300 rrm/drm rsm/dsm max. non-repetitive reverse/forward blocking voltag e max. repetitive reverse/forward blocking voltage r/d reverse current, drain current tt r/d r/d 200 0,20 ixys reserves the right to change limits, condition s and dimensions. 20150827c data according to iec 60747and per semiconductor un less otherwise specified ? 2015 ixys all rights reserved
CLA40P1200FC ratings pr odu c t m a rk in g date code part no. logo ul listed ixys assembly code assembly line isoplus? xxxxxxxxx ? abcd zyyww c l a 40 p 1200 fc part description thyristor (scr) high efficiency thyristor (up to 1200v) phase leg i4-pac (5) = = = current rating [a] reverse voltage [v] = = = = package t op c t vj c 150 virtual junction temperature -40 weight g 9 symbol definition typ. max. min. conditions operation temperature unit f c n 120 mounting force with clip 20 v v t = 1 second v t = 1 minute isolation voltage mm mm 1,7 5,1 d spp/app creepage distance on surface | striking distance th rough air d spb/apb terminal to backside i rms rms current 70 a per terminal 125 -40 terminal to terminal i4-pac delivery mode quantity code no. ordering number marking on product ordering 50/60 hz, rms; i 1 ma isol CLA40P1200FC 510210 tube 25 CLA40P1200FC standard 3000 isol t stg c 150 storage temperature -40 2500 threshold voltage v 0,86 m ? v 0 max r 0 max slope resistance * 5,4 equivalent circuits for simulation t = vj i v 0 r 0 thyristor 150 c * on die level ixys reserves the right to change limits, condition s and dimensions. 20150827c data according to iec 60747and per semiconductor un less otherwise specified ? 2015 ixys all rights reserved
CLA40P1200FC b4 4x e e w a a2 a1 c 4x b2 5x b e1 d1 d2 l1 l d r q 1 2 5 3 4 d3 d i e kon v e x e f o r m des s ubs t r a t es i s t t y p . < 0 . 05 mm be r der kunststoffoberfl?che der bauteilunterseite the convexbow of substrate is typ. < 0.05 mm over plastic surface level ofdevice bottom side min max min max a 4.83 5.21 0.190 0.205 a1 2.59 3.00 0.102 0.118 a2 1.17 2.16 0.046 0.085 b 1.14 1.40 0.045 0.055 b2 1.47 1.73 0.058 0.068 b4 2.54 2.79 0.100 0.110 c 0.51 0.74 0.020 0.029 d 20.80 21.34 0.819 0.840 d1 14.99 15.75 0.590 0.620 d2 1.65 2.03 0.065 0.080 d3 20.30 20.70 0.799 0.815 e 19.56 20.29 0.770 0.799 e1 16.76 17.53 0.660 0.690 e 3.81 bsc 0.150 bsc l 19.81 21.34 0.780 0.840 l1 2.11 2.59 0.083 0.102 q 5.33 6.20 0.210 0.244 r 2.54 4.57 0.100 0.180 w - 0.10 - 0.004 di m. millimeter inches 2 4 3 1 5 outlines i4-pac ixys reserves the right to change limits, condition s and dimensions. 20150827c data according to iec 60747and per semiconductor un less otherwise specified ? 2015 ixys all rights reserved
CLA40P1200FC 0 40 80 120 160 0 10 20 30 40 50 60 70 80 10 100 1000 1 10 100 1000 0,01 0,1 1 100 200 300 400 500 6 0 0 0,0 0,5 1,0 1,5 2,0 2,5 0 30 60 90 120 1 50 1 10 100 1000 10000 0,0 0,2 0,4 0,6 0,8 i t [a] t [s] v t [v] 2 3 4 5 6 7 8 9 01 1 100 1000 10 0 00 i 2 t [a 2 s] t [ms] i tsm [a] t vj = 25c t vj = 125c t vj = 45c 50 hz, 80% v rrm t vj = 125c t vj = 45c v r = 0 v v g [v] i g [ma] i t(av)m [a] t case [c] z thjc [k/w] t [ms] fig. 1 forward characteristics fig. 2 surge overload current i tsm : crest value, t: duration fig. 3 i 2 t versus time (1-10 s) fig. 4 gate voltage & gate current fig. 6 max. forward current at case temperature fig. 7 transient thermal impedance junction to case t gd [s] i g [ma] lim. typ. fig. 5 gate controlled delay time t gd 0 10 20 30 40 50 0 20 40 60 i t(av) [a] p (av) [w] fig. 7a power dissipation versus direct output current fig. 7b and ambient temperature 0 50 100 150 t amb [c] t vj = 125c r thha 0.6 0.8 1.0 2.0 4.0 8.0 dc = 1 0.5 0.4 0.33 0.17 0.08 dc = 1 0.5 0.4 0.33 0.17 0.08 t vj = 125c 1 10 100 1000 10000 0,1 1 10 4: p gav = 0.5 w 5: p gm = 1 w 6: p gm = 10 w 1: i gd , t vj = 150c 2: i gt , t vj = 25c 3: i gt , t vj = -40c 1 2 3 4 5 6 i r thi (k/w) t i (s) 1 0.01 0.0004 2 005 0.009 3 0.17 0.014 4 0.36 0.05 5 0.21 0.36 thyristor ixys reserves the right to change limits, condition s and dimensions. 20150827c data according to iec 60747and per semiconductor un less otherwise specified ? 2015 ixys all rights reserved


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